we are Primary focus is on Design Verification, despite the role being titled RTL Design Engineer.
Looking for experienced candidates, not entry-level resources.
Candidates should have completed multiple Design Verification cycles and possess end-to-end verification experience.
Solid hands-on expertise in:
SystemVerilog
UVM
Testbench component development
Test case development
VIP integration
Verification methodologies and debugging
Candidates should be capable of independently handling complex verification tasks with minimal guidance.
Exposure to IP Verification is highly preferred.
Experience in protocols such as PCIe, Ethernet, Memory, or similar domains will be considered relevant.




Solid coding skills and a solid understanding of the overall verification process are essential.

Preferred Candidate Profile
Candidates with proven industry experience in verification environments.
Professionals who have worked on complex IP/subsystem-level verification projects.
Candidates demonstrating technical maturity and ownership of verification deliverables.

Action Items
Please prioritize this requirement and share relevant, quality profiles.
Focus on candidates with solid UVM/SystemVerilog and IP Verification experience.
Hiring team is looking for candidates who can contribute immediately and independently.

📌 Ip Verification Engineer Bangalore Rural (India)
🏢 Sunrise BizTech Systems
📍 India