Job DescriptionLocation: Bangalore / Hyderabad, India
NExperience: 4–10 Years
NEmployment Type: Full time
NRole Summary
nWe are looking for an experienced Analog Layout Engineer to join our semiconductor design team and work on high-performance analog and mixed-signal IPs in advanced CMOS/FinFET technology nodes.
NThe ideal candidate should have solid hands-on experience in full-custom analog layout, preferably with TSMC technology nodes, and a solid understanding of matching, parasitics, advanced layout techniques, and physical verification.
NThe role involves workingclosely with analog circuit designers, physical verification, and other cross-functional teams to deliver high-quality, silicon-ready layouts.
NKey Responsibilities
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Develop full-custom analog and mixed-signal layouts for complex IC designs. N
Work on layout of analog building blocks such as: N
Op-Ampsn
Bandgap references N
LDOs / Regulatorsn
ADC/DAC blocks N
PLL/DLLn
Charge Pumps N
Current/Voltage References N
High-speed I/O and SerDes/DDR PHY circuits N




Implement advanced layout techniques including: N
Common-centroidn
Interdigitation N
Symmetryn
Matching N
Dummy devicesn
Guard rings N
Shieldingn
Sensitive-node isolation N
Perform parasitic-awarelayout optimization and minimize the impact of routing and device parasitics on circuit performance. N
Work closely with analog designers to understand circuit requirements and translate schematics into optimized physical layouts. N
Perform DRC, LVS, ERC and other physical verification checks and debug layout issues. N
Support PEX/post-layoutsimulation and optimize layouts based on extracted parasitics. N
Ensure layouts meet requirements for area, matching, noise, reliability, EM/IR and performance. N
Work with advanced TSMCtechnology nodes, including FinFET-based processes. N
Collaborate with circuit design, verification, reliability, and physical design teams

📌 Hiring: Analog Layout Engineer Karnataka (India)
🏢 Leadic Design
📍 India