Job Description
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Experience: 4–10 Years N
Location: Bengaluru N
Employment Type: Full time N

nAbout the Role
nWe are looking for an experienced Memory / Custom Layout Engineer to join our semiconductor design team and work on advanced SRAM, ROM, NVM and memory compiler designs.
NThe ideal candidate will have solid hands-on experience in full-custom memory layout, including bitcells, memory arrays, row/column decoders, sense amplifiers, I/O and peripheral circuits. The role will involve working closely with circuit design, physical verification and technology teams to develop high-quality, area-effective and silicon-ready layouts in advanced CMOS/FinFET technologies.
NKey Responsibilities
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Develop full-custom layouts for SRAM, ROM, NVM and memory compiler blocks. N
Perform hands-on layoutimplementation of Bitcells, Memory arrays, Row and column decoders, Sense amplifiers, I/O circuits, Peripheral circuits, Control and supporting logic N
Perform floorplanning, placement and routing for complex memory blocks. N




Develop hierarchical layouts and optimize layouts for area, performance, power and manufacturability. N
Apply advanced layout techniques for matching, symmetry, parasitic reduction and noise isolation. N
Analyze and optimize layout considering design rules, device characteristics and technology requirements. N
Perform physical verification including DRC, LVS, ERC, Antenna, EM/IR N
Debug physical verification issues and work with circuit/physical design teams to resolve them. N
Support post-layout extraction and parasitic-aware optimization. N
Work closely with circuit designers to understand layout-critical requirements and achieve desired PPA targets. N
Support block-level andtop-level memory integration and tapeout activities. N
Contribute to layout methodology, automation and productivity improvements. N

nRequired Skills & Experience
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Bachelor's or Master's degree in ECE, EE, VLSI,

📌 Hiring: Memory Layout Engineer Bengaluru (India)
🏢 Leadic Design
📍 India