Job DescriptionCompany: LeadSoc Technologies NLocation: Bangalore NExperience: 2+ Years NNotice Period: 0–30 Days preferred NJob SummarynLeadSoc Technologies is looking for a Memory Layout Engineer with 2+ years of relevant experience in custom/analog layout, preferably with hands-on experience in memory layout and advanced semiconductor technologies. NKey Responsibilitiesn N Develop and implement custom layouts for memory circuits such as SRAM and other memory macros. N Perform transistor-level layout of bit cells, peripheral circuits, sense amplifiers, decoders, write drivers, and related blocks. N Work closely with circuit designers to understand schematics and layout requirements. N Ensure layout quality with respect to DRC, LVS, ERC and PEX requirements. N Perform layout optimization for area, matching, parasitics, power, and performance.



N Handle full-custom layout using industry-standard EDA tools. N Debug and resolve physical verification issues. N Support ECOs, design iterations, and post-layout verification. N Collaborate with design, verification, and physical verification teams to meet project schedules. NnPreferredn N Experience working on memory macros, bit cells, or memory peripheral circuits. N Exposure to FinFET / advanced-node technologies. N Candidates with relevant hands-on Memory Layout experience will be preferred over profiles with only general/analog layout experience. NnInterested candidates can share their updated resume with: [email protected]

📌 Memory Layout Enginer (Vasanthanagar)
🏢 Leadsoc Technologies
📍 Vasanthanagar