Job DescriptionJob Title: Functional Verification Engineer NLocation: Bangalore NExperience: 4+ Years NJob Type: Full-time NIndustry: Semiconductor / VLSI / ASIC Design NEducation: B.E./B.Tech or M.E./M.Tech in ECE/EEE/Computer Engineering NJob Description: NWe are seeking a skilled and detail-oriented Functional Verification Engineer to be part of our IP/SoC verification team. The candidate will be responsible for verifying complex digital designs using industry-standard methodologies to ensure functional correctness and high-quality silicon delivery. NKey Responsibilities: Nn Develop and execute verification test plans based on design specifications and architecture. N Design and implement testbenches using SystemVerilog and UVM methodology. N Create constrained-random and directed test cases. N Build verification components (agents, monitors, scoreboards, checkers). N Perform coverage analysis (code and functional) and close coverage gaps. N Debug simulation failures and work closely with design and architecture teams.



N Conduct regressions andanalyze results for functional and performance issues. N Document test plans, verification environments, and test results. N Participate in design and verification reviews. NnRequired Skills: Nn 4+ years of hands-on experience in functional verification of IP/SoC. N Robust knowledge and working experience with SystemVerilog and UVM. N Familiarity with RTL design (Verilog/VHDL). N Experience in coverage-driven verification, assertions, and functional coverage closure. N Proficient in using simulators like VCS, Questa, or Incisive. N Good scripting skills in Perl, Python, or Shell for automation. N Strong debugging skillsusing simulation waveform viewers. N Good understanding of common protocols such as AXI, AHB, APB, PCIe, USB, etc NnnInterested can Share CV to [email protected]

📌 Functional Verification Engineer (Vasanthanagar)
🏢 ACL Digital
📍 Vasanthanagar