Job Description:
Experience in block/full-chip level IR Drop analysis and signoff is preferred.
Robust debugging, analytical, and problem-solving skills.
Experience on verifying PMICs or Mixed-Signal products.
Verification of analog and mixed-signal blocks, including but not limited to bandgaps, LDOs, Buck multi-phase switching regulators, comparators, and FuSa monitoring circuits.
Develop and/or update models of analog blocks using SV-RNM.
Understand and verify digital functionalities such as CRC, Clock Monitoring, Register maps, and OTPs, Communication Interfaces.
Understanding of System Verilog including assertions and cover groups.
Create and manage VSIF files for regression.
Ability to perform coverage analysis using IMC or vManager.
Make file scripting is a plus.
Ability to work independently under broad direction.
Experience (years) : 4+ years
Education Qualification:
BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent