Job DescriptionCompany: LeadSoc Technologies

NLocation: Bangalore

NExperience: 2+ Years

NNotice Period: 0–30 Days preferred

NJob Summary

nLeadSoc Technologies is looking for a Memory Layout Engineer with 2+ years of relevant experience in custom/analog layout, preferably with hands-on experience in memory layout and advanced semiconductor technologies.

NKey Responsibilities

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- Develop and implement custom layouts for memory circuits such as SRAM and other memory macros.
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- Perform transistor-level layout of bit cells, peripheral circuits, sense amplifiers, decoders, write drivers, and related blocks.
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- Work closely with circuit designers to understand schematics and layout requirements.
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- Ensure layout quality with respect to DRC, LVS, ERC and PEX requirements.
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- Perform layout optimization for area, matching, parasitics, power, and performance.
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- Handle full-custom layout using industry-standard EDA tools.
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- Debug and resolve physical verification issues.
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- Support ECOs, design iterations, and post-layout verification.
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- Collaborate with design, verification, and physical verification teams to meet project schedules.
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nPreferred

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- Experience working on memory macros, bit cells, or memory peripheral circuits.
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- Exposure to FinFET / advanced-node technologies.
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- Candidates with relevant hands-on Memory Layout experience will be preferred over profiles with only general/analog layout experience.
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nInterested candidates can share their updated resume with:

[email protected]

📌 Memory Layout Enginer (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru