SoC Design Director
nTop40 Semiconductor Organization in the world
nBangalore
nRole Overview
nWe are seeking a Digital Design professional with deep expertise in high-performance controller and bridge design, micro-architecture, RTL implementation, and IP integration. The ideal candidate will play a critical role in the development of cutting-edge connectivity solutions.
nKey Responsibilities
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- Design and implement high-performance digital solutions, including RTL development and synthesis.Collaborate with cross-functional teams on IP integration for processor IPs and peripherals
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- Deep knowledge of processor boot process and peripheral implementation with boot firmware inmind Own block-level and full-chip designs from architecture to GDS, focusing on designs at nodes ≤16nm.Ensure timing closure, assess verification completeness, and oversee pre- and post-silicon debug.Utilize tools from Synopsys/Cadence to ensure first-pass silicon success and apply expertise in UVM-based verificationflows
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- Basic Qualifications / Experience Level
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- Bachelor's in Electronics/Electrical engineering (Master's prefe
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- rred).Minimum 15+ years of digital design experience, with focus on processor, peripherals and full chip implementation.Proven expertise in RTL development, synthesis, and timing closure.Experience with front-end design, gate-level simulations, and design verification.Strong work ethic, ability to handle multiple tasks, and a proactive, customer-focused atttude.
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nRequired Expertise
nProven expertise in micro-architecture development and RTL development for block level and full-chip designs at advanced
nnodes (Experience with front-end design, gate-level simulations,
and supporting design verification through multiple ASIC T/O
ncycles .Hands-on experience with processor IP (
nARM/ARC)
nExperience of working on PCIe is a must
n.Hands-on pre-silicon and post-silicon implementing peripherals for I2C/
nSPI/UART
nHands-on experience with complex DMA engines and FW interaction
n.Strong proficiency in System Verilog/Verilog and scripting (Pytho
nn/Perl)
n.Experience with block-level and full-chip design at advanced nodes (≤ 16nm)
n.Silicon bring-up and post-silicon debug experience
n.Familiarity with industry standard simulation, debug, quality checking and synthesis tools Synopsys/Cadence tools and UVM-based design verification
n.Strong work ethic, ability to handle multiple tasks, and a proactive, customer-focused attitude.
nPreferred Experience
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- Knowledge and experience implementing secure boot and security mechanisms like authentication and attestation
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nis a plus
n.Knowledge of system-level design with ARM/ARC/RISC-V processorssub systems
nExperience of working on PCIe/UAL isa big plus
n.Understanding of PAD design, DFT, and floor planning
n.Experience in synthesis, and timing closure is a big plus
n.Experience with NIC, switch, or storage product development
n.Familiarity with working in design and verification workflows in a CI/CD workplace.
nSkils
nmicroarchitecture
n"rtl design" / "RTL coding" /"RTL Development" /"Logic design"
nSynthesis
n"timing closure"
nARM
nARC
nPCIe
nVerilog
nSystemVerilog (SV)
nUVM
nRISC-V
nUAL (UALink)
nNIC / Sartnic
nSwitch / Ethernet /"Ultra ethernet"
nNVlink
nCXL
nRISC-V
nDMA
nNetworking
n"data center"
nContact: Uday
nMulya Technologies
[email protected]
📌 SoC Design Director (Bengaluru)
🏢 Mulya Technologies
📍 Bengaluru