IP Design Director

nTop40 Semiconductor Organization in the world

nBangalore

nRole Overview

nWe are seeking a Digital Design qualified with deep expertise in high-performance controller and bridge design, micro-architecture, RTL implementation, and IP integration. The ideal candidate will play a critical role in the development of cutting-edge connectivity solutions

nKey Responsibilities

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- Design and implement high-performance digital solutions, including RTL development and synthesis.
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- Collaborate with cross-functional teams on IP integration for processor IPs and peripherals
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- Deep knowledge of processor boot process and peripheral implementation with boot firmware inmind
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- Own block-level and full-chip designs from architecture to GDS, focusing on designs at nodes ≤
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- 16nm.Ensure timing closure, assess verification completeness, and oversee pre- and post-silicon d
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- ebug.Utilize tools from Synopsys/Cadence to ensure first-pass silicon success and apply expertise in UVM-based verification
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nflows

nBasic Qualifications / ExperienceLevel

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- Bachelor's in Electronics/Electrical engineering (Master's preferred).
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- Minimum 15+ years of digital design experience, with focus on processor, peripherals and full chip implementation.
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- Proven expertise in RTL development, synthesis, and timing closure.
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- Experience with front-end design, gate-level simulations, and design verification.
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- Strong work ethic, ability to handle multiple tasks, and a proactive, customer-focused attitude.Required
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nExpertise

nProven expertise in micro-architecture development and RTL development for block level and full-chip designs at advaned nodes (Experience with front-end design, gate-level simulations,



and supporting design verification through multiple ASIC T/O cycles .

nHands-on experience with processor IP

n(ARM/ARC)Experience of working on PCIe

nis a must.

nHands-on pre-silicon and post-silicon implementing peripherals for I2

nC/SPI/UART

nHands-on experience with complex DMA engines and FW interaction.

nStrong proficiency in System Verilog/Verilog and scripting (Python/Perl).

nExperience with block-level and full-chip design at advanced nodes

n(≤ 16nm).

nSilicon bring-up and post-silicon debug experience.

nFamiliarity with industry standard simulation, debug, quality checking and synthesis tools Synopsys/Cadence tools and UVM-based design verification.

nStrong work ethic, ability to handle multiple tasks, and a proactive, customer-focused attitude.

nPreferred Experience

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- Knowledge and experience implementing secure boot and security mechanisms like authentication and attestation is a plus.
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- Knowledge of system-level design with ARM/ARC/RISC-V processors sub systems
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- Experience of working on PCIe/UAL
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- is a big plus.Understanding of PAD design, DFT, and floor planning.
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- Experience in synthesis, and timing closureis a big plus.
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- Experience with NIC, switch, or storage product development.
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- Familiarity with working in design and verification workflows in a CI/CD environment.
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nSkils

nmicroarchitecture

n"rtl design" / "RTL coding" /

n"RTL Development" /"Logic design"

nSynthesis

n"timing closure"

nARM/ ARC / RISC-V

nPCIe

nVerilog

nSystemverilog (SV )

nUVM

nUAL (UALink)

nNIC

nSwitch / Ethernet / "ultra ethernet"

nnvlink

n"Digital design"

nDMA

n"ip design"

n"ip development"

n"ip integraton"

nContact: Uday

nMulya Technologies

nmuday_

[email protected]

📌 IP Design Director (Bengaluru)
🏢 Mulya Technologies
📍 Bengaluru