Job DescriptionCompany: LeadSoc Technologies
nLocation: Bangalore
nExperience: 2+ Years
nNotice Period: 0–30 Days preferred
nJob Summary
nLeadSoc Technologies is looking for a Memory Layout Engineer with 2+ years of relevant experience in custom/analog layout, preferably with hands-on experience in memory layout and advanced semiconductor technologies.
nKey Responsibilities
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- Develop and implement custom layouts for memory circuits such as SRAM and other memory macros.n
- Perform transistor-level layout of bit cells, peripheral circuits, sense amplifiers, decoders, write drivers, and related blocks.n
- Work closely with circuit designers to understand schematics and layout requirements.n
- Ensure layout quality with respect to DRC, LVS, ERC and PEX requirements.n
- Perform layout optimization for area, matching, parasitics, power, and performance.n




- Handle full-custom layout using industry-standard EDA tools.n
- Debug and resolve physical verification issues.n
- Support ECOs, design iterations, and post-layout verification.n
- Collaborate with design, verification, and physical verification teams to meet project schedules.n

nPreferred
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- Experience working on memory macros, bit cells, or memory peripheral circuits.n
- Exposure to FinFET / advanced-node technologies.n
- Candidates with relevant hands-on Memory Layout experience will be preferred over profiles with only general/analog layout experience.n

nInterested candidates can share their updated resume with:
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📌 Memory Layout Enginer (Vasanthanagar)
🏢 Leadsoc Technologies
📍 Vasanthanagar