Job Description: Candidate must have good understanding of the System-Verilog, UVM and Test case development. Must have valuable debugging skills Required experience in Cadence Tool chain (Xcellium) Experience in AMBA protocol (AXI3/4, AHB, APB)Experience in usage of 3rd party VIP is plus Experience in PCIe protocol is plus
Please share your profile to jayalakshmi.r2@
Regards,
Jaya
📌 Dv Profiles With Pcie And Xcellium (Bengaluru)
🏢 Anonymous
📍 Bengaluru
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