4-10 years of experience in emulation model development and verification for complex So Cs. Substantial knowledge of emulation platforms from Synopsys, Cadence, and Siemens. Robust understanding of processor architecture, So C components, and interconnect protocols. Hands-on experience with IO protocols such as PCIe, CXL, Ethernet, and memory technologies like DDR and HBM. Proficient in scripting languages including Perl, Python, Tcl, and UNIX Shell. Proven ability to define emulation strategies and lead execution on platforms like Veloce, Zebu, and Palladium. Excellent problem-solving and debugging skills in emulation environments.