Job DescriptionOur Client is Leading SOC developer it's headquaters is in Korea,
nCTC: As per market standards
nExp: 12+ yrs
nLocation: Bangalore
nKey Responsibilities
nSoC DFT Architecture & Leadership
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- Own SoC-level DFT architecture and strategy for custom and platform-based SoCs.n
- Define and drive DFT implementation plans across multiple concurrent SoC programs.n
- Act as the technical authority and signoff owner for all DFT-related decisions and deliverables.n

nExecution & Technical Ownership
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- Lead DFT RTL integration, scan insertion, and test architecture implementation.n
- Own and drive:n
- Scan, Compression, and ATPG strategyn
- MBIST, BISR, and redundancy implementationn
- JTAG / TAP, Boundary Scan, and debug infrastructuren
- Ensure DFT readiness across functional, scan, and low-power modes.n
- Collaborate with RTL, STA, and PD teams to ensure DFT-friendly design and implementation.n
- Drive ATPG pattern generation, simulation, and debug to ensure high test coverage and quality.n

nCross-Functional & Manufacturing Interface
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- Work closely with physical design teams to ensure scan and test logic closure with minimal PPA impact.n
- Interface with manufacturing, ATE, and OSAT teams on test requirements, vector delivery, and silicon bring-up.n
- Support post-silicon debug, yield ramp, and test optimization.n
- Represent Semifive in customer-facing technical discussions related to DFT strategy and signoff.n

nMethodology & Team Development
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- Define and standardize DFT methodologies, flows, and checklists across Semifive programs.n
- Drive automation, scripting, and reuse to improve DFT efficiency and predictability.n
- Mentor and develop DFT engineers and leads, building deep technical and execution capability.n
- Review and approve DFT signoff reports and tapeout readiness criteria.n

nQualifications
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- B.E./B.Tech or M.E./M.Tech in Electrical / Electronics / VLSI Engineering.n
- 12+ years

📌 Lead DFT (Karnataka)
🏢 M/s Angel and Genie
📍 Karnataka