Sr. Design Verification Engineer_Pune (Pune)

Sr. Design Verification Engineer_Pune (Pune)

16 Sep
|
Scaledge Technology
|
Pune

16 Sep

Scaledge Technology

Pune

5+ Years Experience in System Verilog and UVM methodology

Hands-on expertise in high-speed interface protocols (PCIe / CXL/UCIE/USB / DDR / Ethernet / AXI, etc.)

Good understanding of verification concepts, coverage, assertions, and debugging

Experience with simulation tools (VCS, Questa, Xcelium, etc.)

Solid analytical & problem-solving skills

Share your updated resume: [email protected]

📌 Sr. Design Verification Engineer_Pune (Pune)
🏢 Scaledge Technology
📍 Pune

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