? WE’RE HIRING | Physical Design & Signoff Engineer | 6+ Years

? RTLYNX Semicon India Pvt. Ltd. is looking for an experienced Physical Design / Implementation Engineer with strong hands-on expertise in Netlist-to-GDSII implementation and full signoff for a Camera Serializer digital subsystem.

? Location: Bengaluru

? Experience: 6+ Years

? Key Skills & Responsibilities

- End-to-end Netlist-to-GDSII implementation & signoff
- Floorplanning – ASA PHY placement, keep-out rules & analog guard-ring considerations
- Multi-voltage domain Physical Design – 0.8V Core, 1.8V I/O & dedicated PHY rails
- Hands-on experience with UPF/CPF-based power intent
- High-speed routing for ASA MDI differential pairs, CSI-2 D-PHY lanes & PTB clock distribution
- STA across multiple clock domains, including derived clocks & asynchronous paths
- EM/IR Drop analysis and power integrity signoff
- DRC/LVS closure and physical verification
- Tapeout database ownership – GDSII & OpenAccess (OA)

?️ Mandatory Tools & Technology

✅ Cadence Genus – Synthesis





✅ Cadence Innovus – Place & Route

✅ Cadence Tempus – STA

✅ Cadence Voltus – EM/IR Analysis

✅ Mentor Calibre – DRC/LVS

✅ TSMC 22nm ULL PDK experience – MANDATORY

? Ideal Candidate:

A strong Physical Design / Implementation qualified with hands-on experience in ASIC/SoC backend flow, P&R;, STA, physical verification, EM/IR and tapeout/signoff, preferably in advanced/high-speed semiconductor designs.

? Interested candidates: Please share your updated CV at [email protected]

? Immediate Joiners & Serving Notice Period candidates are highly preferred.

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#RTLYNX

📌 Physical Design & Signoff Engineer (Bangalore Metropolitan Area)
🏢 RTLYNX SEMICON
📍 Bangalore Metropolitan Area