Company Description Corp Match Private Limited (Corpmatch) is a placement-focused training and hiring ecosystem dedicated to transforming students into industry-ready professionals. The company partners with colleges and corporations across India to bridge the gap between academic learning and real-world expectations.

Through structured, industry-aligned programs in IT, non-IT, and financial domains, Corpmatch focuses on measurable placement outcomes and sustainable talent pipelines. By working closely with institutions, employers, and learners, Corpmatch aims to reduce the skill gap, improve employability, and create meaningful career opportunities. Its mission is to ensure education consistently leads to employment through practical exposure and result-driven execution.

Role Description The Physical Design Engineer will be responsible for executing end-to-end physical design activities for ASIC/SoC projects, including floorplanning, placement, clock tree synthesis, routing, and timing closure. Day-to-day work will involve close collaboration with RTL and verification teams to ensure design intent, power, performance, and area goals are met.

The engineer will perform physical verification checks, analyze reports, and resolve design and layout issues to meet sign-off criteria. This is a full-time, on-site role based in Andhra Pradesh, India,



requiring active participation in cross-functional reviews, documentation, and continuous improvement of design flows and methodologies.

Qualifications

- Candidates should possess strong skills in Physical Design, including floorplanning, placement, clock tree synthesis, routing, and timing closure.
- Candidates should possess solid experience in Physical Verification, including DRC, LVS, IR-drop, and electromigration analysis.
- Candidates should possess skills in Logic Design and Circuit Design, with a good understanding of digital design fundamentals, timing, and power concepts.
- Candidates should possess expertise in RTL Design, including RTL integration, synthesis constraints, and working with front-end design teams.
- Candidates should be familiar with industry-standard EDA tools (e.g., Cadence, Synopsys, or Mentor) and common semiconductor process technologies.
- Bachelor’s or Master’s degree in Electrical Engineering, Electronics, VLSI, or a related field is preferred.
- Candidates should demonstrate strong analytical, problem-solving, and communication skills, with the ability to collaborate in cross-functional engineering teams.
- Prior internship or qualified experience in VLSI/ASIC design flows will be an advantage.

📌 Physical Design Engineer (Andhra Pradesh)
🏢 Corp Match Private
📍 Andhra Pradesh