- Solid experience in Memory Layout Design (SRAM/DRAM)
- Good knowledge of Analog & Custom Layout techniques
- Experience in Floorplanning & Layout Optimization
- Hands-on experience with DRC, LVS & ERC verification
- Knowledge of Parasitic Extraction & Analysis
- Experience with Cadence Virtuoso and Calibre
- Good understanding of Process Nodes & Design Rules
- Strong problem-solving skills