IP Design Director /n Top40 Semiconductor Organization in the world /n Bangalore /n Role Overview /n We are seeking a Digital Design professional with deep expertise in high-performance controller and bridge design, micro-architecture, RTL implementation, and IP integration. The ideal candidate will play a critical role in the development of cutting-edge connectivity solutions /n Key Responsibilities /n /n

- Design and implement high-performance digital solutions, including RTL development and synthesis.

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- Collaborate with cross-functional teams on IP integration for processor IPs and peripherals

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- Deep knowledge of processor boot process and peripheral implementation with boot firmware inmind

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- Own block-level and full-chip designs from architecture to GDS, focusing on designs at nodes ≤

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- 16nm.Ensure timing closure, assess verification completeness, and oversee pre- and post-silicon d

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- ebug.Utilize tools from Synopsys/Cadence to ensure first-pass silicon success and apply expertise in UVM-based verification

/n /n flows /n Basic Qualifications / ExperienceLevel /n /n

- Bachelor's in Electronics/Electrical engineering (Master's preferred).

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- Minimum 15+ years of digital design experience, with focus on processor, peripherals and full chip implementation.

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- Proven expertise in RTL development, synthesis, and timing closure.

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- Experience with front-end design, gate-level simulations, and design verification.

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- Strong work ethic, ability to handle multiple tasks, and a proactive, customer-focused attitude.Required

/n /n Expertise /n Proven expertise in micro-architecture development and RTL development for block level and full-chip designs at advaned nodes (Experience with front-end design, gate-level simulations,



and supporting design verification through multiple ASIC T/O cycles . /n Hands-on experience with processor IP /n (ARM/ARC)Experience of working on PCIe /n is a must. /n Hands-on pre-silicon and post-silicon implementing peripherals for I2 /n C/SPI/UART /n Hands-on experience with complex DMA engines and FW interaction. /n Strong proficiency in System Verilog/Verilog and scripting (Python/Perl). /n Experience with block-level and full-chip design at advanced nodes /n (≤ 16nm). /n Silicon bring-up and post-silicon debug experience. /n Familiarity with industry standard simulation, debug, quality checking and synthesis tools Synopsys/Cadence tools and UVM-based design verification. /n Strong work ethic, ability to handle multiple tasks, and a proactive, customer-focused attitude. /n Preferred Experience /n /n

- Knowledge and experience implementing secure boot and security mechanisms like authentication and attestation is a plus.

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- Knowledge of system-level design with ARM/ARC/RISC-V processors sub systems

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- Experience of working on PCIe/UAL

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- is a big plus.Understanding of PAD design, DFT, and floor planning.

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- Experience in synthesis, and timing closureis a big plus.

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- Experience with NIC, switch, or storage product development.

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- Familiarity with working in design and verification workflows in a CI/CD workplace.

/n /n Skils /n microarchitecture /n "rtl design" / "RTL coding" / /n "RTL Development" /"Logic design" /n Synthesis /n "timing closure" /n ARM/ ARC / RISC-V /n PCIe /n Verilog /n Systemverilog (SV ) /n UVM /n UAL (UALink) /n NIC /n Switch / Ethernet / "ultra ethernet" /n nvlink /n "Digital design" /n DMA /n "ip design" /n "ip development" /n "ip integraton" /n Contact: Uday /n Mulya Technologies /n muday_ /n [email protected]

📌 IP Design Director (Bengaluru)
🏢 Mulya Technologies
📍 Bengaluru