We are hiring for one of our reputed company for the below position, If interested Apply for the same.
Job Role: ASIC Design & QA Flows Engineer
Duration:12 Months Contract
Location: Hyderabad
Required Skills
- 3+ years of experience in ASIC/SoC development environments.
- Solid understanding of Verilog/SystemVerilog and ASIC design methodologies.
- Hands-on experience with Lint and CDC/RDC verification.
- Knowledge of DFT concepts and Scan flows.
- Experience with Logic Synthesis and netlist generation.
- Hands-on experience with LEC/Formality or equivalent formal verification tools.
- Experience with Synopsys, Cadence, or Siemens EDA tools.
- Strong scripting/automation skills in Python, Tcl, Perl, or Shell.
- Good debugging, analytical, and root-cause investigation skills.