Job Description

SoC Design Director

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Top40 Semiconductor Organization in the world

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Bangalore

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Role Overview

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We are seeking a Digital Design professional with deep expertise in high-performance controller and bridge design, micro-architecture, RTL implementation, and IP integration. The ideal candidate will play a critical role in the development of cutting-edge connectivity solutions.

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Key Responsibilities

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- Design and implement high-performance digital solutions, including RTL development and synthesis.Collaborate with cross-functional teams on IP integration for processor IPs and peripherals
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- Deep knowledge of processor boot process and peripheral implementation with boot firmware inmind Own block-level and full-chip designs from architecture to GDS, focusing on designs at nodes ≤16nm.Ensure timing closure, assess verification completeness, and oversee pre- and post-silicon debug.Utilize tools from Synopsys/Cadence to ensure first-pass silicon success and apply expertise in UVM-based verificationflows
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- Basic Qualifications / Experience Level
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- Bachelor's in Electronics/Electrical engineering (Master's prefe
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- rred).Minimum 15+ years of digital design experience, with focus on processor, peripherals and full chip implementation.Proven expertise in RTL development, synthesis, and timing closure.Experience with front-end design, gate-level simulations, and design verification.Robust work ethic, ability to handle multiple tasks, and a proactive, customer-focused atttude.
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Required Expertise

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Proven expertise in micro-architecture development and RTL development for block level and full-chip designs at advanced

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nodes (Experience with front-end design, gate-level simulations,



and supporting design verification through multiple ASIC T/O

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cycles .Hands-on experience with processor IP (

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ARM/ARC)

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Experience of working on PCIe is a must

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.Hands-on pre-silicon and post-silicon implementing peripherals for I2C/

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SPI/UART

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Hands-on experience with complex DMA engines and FW interaction

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.Strong proficiency in System Verilog/Verilog and scripting (Pytho

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n/Perl)

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.Experience with block-level and full-chip design at advanced nodes (≤ 16nm)

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.Silicon bring-up and post-silicon debug experience

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.Familiarity with industry standard simulation, debug, quality checking and synthesis tools Synopsys/Cadence tools and UVM-based design verification

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.Strong work ethic, ability to handle multiple tasks, and a proactive, customer-focused attitude.

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Preferred Experience

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- Knowledge and experience implementing secure boot and security mechanisms like authentication and attestation
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is a plus

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.Knowledge of system-level design with ARM/ARC/RISC-V processorssub systems

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Experience of working on PCIe/UAL isa big plus

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.Understanding of PAD design, DFT, and floor planning

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.Experience in synthesis, and timing closure is a big plus

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.Experience with NIC, switch, or storage product development

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.Familiarity with working in design and verification workflows in a CI/CD environment.

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Skils

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microarchitecture

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"rtl design" / "RTL coding" /"RTL Development" /"Logic design"

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Synthesis

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"timing closure"

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ARM

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ARC

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PCIe

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Verilog

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SystemVerilog (SV)

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UVM

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RISC-V

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UAL (UALink)

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NIC / Sartnic

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Switch / Ethernet /"Ultra ethernet"

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NVlink

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CXL

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RISC-V

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DMA

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Networking

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"data center"

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Contact: Uday

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Mulya Technologies

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[email protected]

📌 SoC Design Director (Bengaluru)
🏢 Mulya Technologies
📍 Bengaluru