We are looking for a Post-Silicon Validation Engineer with solid experience in Power Validation and C programming to work on SoC/processor platforms.

The candidate will be responsible for post-silicon bring-up, power management validation, low-power feature validation, and debugging across different silicon/platform milestones.

Key Responsibilities
Perform post-silicon validation and characterization of SoC/processor power-management features.
Develop and execute C-based validation tests for power and low-power features.
Validate PMIC, voltage rails, regulators, and power-management functionality.
Perform validation of low-power modes and power-state transitions.
Validate DVFS (Energetic Voltage and Frequency Scaling) functionality across different operating conditions.




Validate Power State Manager transitions and related power-management sequences.
Perform clock gating and power gating validation.
Validate clock behavior, frequency monitors, and clock-related functionality.
Measure and analyze latency during power-state and clock transitions.
Perform silicon bring-up, debugging, failure analysis, and root-cause identification.
Execute validation across different voltage, frequency, temperature, and workload conditions.
Collaborate with RTL/design, firmware, architecture, and system teams to debug silicon issues.
Analyze test failures and provide detailed validation reports and debug findings.

📌 Post Silicon Validation Engineer – Power Validation & C Bengaluru
🏢 Mirafra Technologies
📍 Bengaluru