Key Skills: Design, Linux, RTL, SoC

Roles and Responsibilities:

- Develop and maintain DFT methodologies, flows, automation, and reference solutions for Arm-based SoCs.
- Drive alignment and integration of DFT flows within end-to-end RTL-to-GDS and silicon enablement methodologies.
- Collaborate with architecture, implementation, CAD, product engineering, customers, and ecosystem partners to ensure successful deployment.
- Evaluate and enable current capabilities with EDA vendors and technology partners.
- Lead technical reviews, resolve complex integration challenges, and drive methodology improvements.
- Mentor engineers and contribute to the DFT and automation roadmap within CMA.

Skills Required:

- Strong industry experience in DFT implementation, methodology development, and flow integration for complex SoCs.
- Deep understanding of scan, compression, ATPG, MBIST/LBIST, JTAG/IEEE 1149.x, IEEE 1687,



and hierarchical DFT methodologies.
- Experience integrating DFT into implementation, verification, and signoff flows.
- Hands-on expertise with industry-standard DFT EDA tools.
- Strong automation and scripting skills (Python, Tcl, Shell, or similar).
- Excellent debugging, communication, and stakeholder management skills.
- Proven ability to influence technical direction across cross-functional teams.

Preferred Qualifications
- Experience with advanced-node SoC development.
- Familiarity with chiplet or multi-die architectures.
- Experience developing CAD, methodology, or automation infrastructure.
- Knowledge of automotive, safety, or production test requirements.

Education: Bachelor's degree in Engineering

📌 Staff Design Engineer (Bengaluru)
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📍 Bengaluru