Senior SoC / Full Chip Verification Engineer

Experience

10+ Years

Location

Bangalore / Hyderabad / Chennai / Coimbatore

- Lead top-level SoC verification for complex designs integrating PCIe and DDR subsystems.
- Define and execute verification strategies, plans, and methodologies for full-chip validation.
- Develop and maintain UVM/SystemVerilog-based verification environments.
- Drive end-to-end verification including integration, performance, stress, and corner-case scenarios.
- Ensure functional, code, and assertion coverage closure.
- Debug and root-cause complex RTL, protocol, and system-level issues.
- Collaborate closely with design, architecture, firmware, validation, and software teams.
- Lead PCIe Gen5 and DDR4/DDR5 protocol verification and compliance activities.
- Conduct reviews of verification plans, testcases, and coverage metrics to ensure quality and completeness.
- Mentor junior engineers and drive adoption of verification best practices.
- Contribute to continuous improvement of verification methodologies, automation, and reusable verification IPs.
- Robust expertise in Full-Chip/SoC Verification, SystemVerilog, UVM, simulation, debugging, and coverage analysis tools.

📌 Full Chip / SoC Verification Engineer (Karnataka)
🏢 F. Robin Technologies | A Division of F. Robin Group
📍 Karnataka