CPU RTL Design Engineer

Location: Bengaluru

Experience: 5–10 Years

Role Overview:

We are looking for a CPU RTL Design Engineer with strong expertise in CPU microarchitecture, computer architecture, and RTL development for next-generation ARM and RISC-V processors. The ideal candidate will contribute to designing, implementing, and optimizing high-performance CPU cores.

Key Responsibilities:

- Develop and implement CPU RTL designs based on microarchitectural specifications.
- Work on CPU pipelines, instruction execution, branch prediction, load/store units, and memory subsystems.
- Translate microarchitecture and computer architecture concepts into synthesizable RTL.
- Design and optimize CPU datapaths, control logic, and performance-critical blocks.
- Collaborate with architecture, verification, physical design, and performance teams.
- Debug RTL issues, perform functional analysis, and support design quality and signoff.

Core Technical Requirements:

- 5–10 years of experience in CPU RTL Design / Processor Design.




- Strong understanding of CPU Microarchitecture and Computer Architecture.
- Hands-on expertise in Verilog / SystemVerilog RTL design.
- Experience with ARM processor architecture and/or RISC-V ISA.
- Knowledge of CPU pipelines, instruction decoding, execution units, caches, and memory hierarchy.
- Understanding of performance, power, and area (PPA) trade-offs in CPU design.
- Experience with RTL simulation, debugging, and synthesis-aware coding practices.
- Robust problem-solving skills and ability to work on complex CPU design challenges.

Preferred Expertise

- Experience with ARM or RISC-V CPU core development.
- Knowledge of out-of-order or in-order processor architectures.
- Exposure to formal verification, lint, CDC, and RTL quality checks.
- Familiarity with CPU performance optimization and microarchitectural trade-offs.

📌 CPU RTL Design Engineer (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru