Job DescriptionSenior DFT Engineer – Bangalore NExperience: 3+ Years NLocation: Bangalore NKey Responsibilities: Nn Design and implement DFT solutions for complex SoC designs. N Hands-on experience in Scan, ATPG, MBIST, JTAG and DFT DRC/debug. N Perform scan insertion,ATPG pattern generation, fault coverage analysis and optimization. N Experience with MBIST insertion, verification, pattern generation and debug. N Debug DFT simulations, tester failures and support silicon bring-up/post-silicon debug. N Collaborate with RTL, Design, Verification and Physical Design teams. N Contribute to DFT flow automation and methodology improvements. NnRequired Skills: Nn Strong understanding of ASIC/SoC DFT flow and methodologies. N Hands-on experience with Tessent / TetraMAX / TestMAX / Synopsys SMS. N Good knowledge of ATPG,Scan, MBIST, JTAG, IEEE 1500 and OCC. N Experience with VCS / Verdi / Xcelium / Questa simulation and debug. N Knowledge of Verilog/SystemVerilog. N Scripting skills in TCL/ Perl / Python. N Solid debugging, analytical and problem-solving skills. NnEducation: B.E./B.Tech/M.E./M.Tech in ECE, Electrical & Electronics, or VLSI.