18 Sep
|
leadIC Design
|
Bengaluru
18 Sep
leadIC Design
Bengaluru
7+ years of experience in ASIC/SoC Emulation / Pre-Silicon Validation
Cadence Palladium(XP / Z1 / Z2 / Z3) Or ZeBu – Mandatory
Strong experience in Palladium or ZeBu compilation/build flows
Advanced Clocking, ICE & VIF flows
Solid programming skills in SystemC, C/C++
Scripting: Python, TCL, Perl & Shell
RTL: Verilog / SystemVerilog / VHDL
Debugging: Lauterbach, JTAG, Coresight/UltraSoC
SoC protocols: PCIe, DDR/LPDDR, AXI, USB, SPI
📌 Emulation Engineer (Bengaluru)
🏢 leadIC Design
📍 Bengaluru