Design Verification Engineer (Hyderabad)

Design Verification Engineer (Hyderabad)

18 Sep
|
Scaledge
|
Hyderabad

18 Sep

Scaledge

Hyderabad

Required Skills:

Strong experience in System Verilog and UVM methodology

Hands-on expertise in high-speed interface protocols (PCIe / USB / DDR / Ethernet / AXI, etc.)

Valuable understanding of verification concepts, coverage, assertions, and debugging

Experience with simulation tools (VCS, Questa, Xcelium, etc.

Strong analytical & problem-solving skillsRole & responsibilities

📌 Design Verification Engineer (Hyderabad)
🏢 Scaledge
📍 Hyderabad

Reply to this offer

Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.

Subscribe to this job alert:

Get the latest job offers by email for: design verification engineer (hyderabad) / hyderabad

Subscribe to this job alert:

Get the latest job offers by email for: design verification engineer (hyderabad) / hyderabad