We are looking for an experienced Sr. Silicon Validation / Emulation Engineer with 4+ years of experience in emulation, verification, and validation of complex SoC designs. The role involves integrating, testing, and debugging hardware and software using leading emulation platforms.
Key Responsibilities
Emulate complex SoC designs using Zebu, Palladium, and Veloce platforms.
Create and execute emulation test plans and testbenches.
Integrate RTL designs and validate functionality in the emulation environment.
Debug hardware/software integration issues.
Optimize emulation models for performance and debugging.
Automate emulation flows using Python, Perl, and TCL.
Analyze emulation results and provide feedback.
Support pre-silicon and post-silicon validation.
Requirements
Bachelors/Master’s degree in Electrical or Computer Engineering.
4+ years of experience in emulation, prototyping, and validation.
Hands-on experience with Zebu, Palladium, or Veloce.
Robust knowledge of RTL Design (Verilog/VHDL) and SoC verification.
Experience with emulation tools, testbenches, and debugging.
Proficiency in Python / Perl / TCL.
Familiarity with Synopsys VCS, Cadence Xcelium, and waveform analysis.