Role: STA Engineer / Timing Lead
Location: Bengaluru, Karnataka
Experience: 10 15 Years

Strictly - No verification/validation profiles

Key Skills Required

Deep expertise in STA tools - Prime Time, PT-DMSA (PTECO), Tempus, Tweaker
Strong knowledge of timing corners/modes, MMMC, OCV/AOCV/POCV analysis
Experience in high-frequency timing closure (GHz range) at block and full-chip level
Full-chip STA closure - defining mode requirements and corners for signoff
Solid understanding of DFT mode requirements for timing signoff
Good understanding of physical design flow and ECO implementation
Strong command of SDC constraints authoring and validation
Mandatory: TCL scripting skills for flow automation
Signal integrity (SI) - crosstalk delay/noise analysis experience preferred

Ideal Profile

- 10 15 years of dedicated STA / timing closure experience

- Worked on advanced nodes (2nm / 3nm / 4nm preferred)

- Hands-on with automated and manual ECO generation and delivery

- Experience collaborating with PnR, constraints, and DFT teams

📌 STA Engineer / Timing Lead (Bengaluru)
🏢 Cyberidentitysolutions
📍 Bengaluru