19 Sep
|
leadIC Design
|
Noida
19 Sep
leadIC Design
Noida
Location: Noida, Uttar Pradesh
Experience: 4+ Years
Employment Type: Full time
Job Overview
The role involves development, optimization, and physical verification of standard cell libraries for advanced semiconductor technologies. The engineer will work closely with circuit designers, characterization, library, physical design, and technology teams to deliver high-quality, PPA-optimized standard cells meeting stringent performance, power, area, and manufacturability requirements.
Key Responsibilities
- Design and develop physical layouts for standard cells including combinational and sequential logic cells.
- Work on different standard cell variants such as NAND, NOR, INV, BUF, AOI/OAI, MUX, XOR/XNOR, Flip-Flops, Latches, Tie cells, Level Shifters and related library cells.
- Perform full-custom layout of standard cells based on schematics and technology requirements.
- Optimize cell layouts for area, timing, power, routability and overall PPA.
- Ensure proper cell architecture, device placement, diffusion sharing,
pin accessibility and routing while maintaining design-rule compliance.
- Perform DRC, LVS, ERC and other physical verification activities and resolve violations.
- Work with circuit designers to understand electrical requirements and translate schematics into robust, manufacturable layouts.
- Analyze and resolve layout-related issues affecting timing, power, leakage, parasitics and signal integrity.
- Support development and optimization of standard-cell libraries across different process technologies and PVT conditions.
- Collaborate with characterization teams for timing, power and functionality validation of standard cells.
- Support cell benchmarking and PPA analysis against existing/reference libraries.
- Participate in library development activities from layout implementation through physical verification and release.
- Work closely with global teams across design, technology, characterization and physical design.
- Develop or use scripting/autom
📌 Std Cell Layout Engineer (Noida)
🏢 leadIC Design
📍 Noida