As a member of the Client/Graphics Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.
Job Summary
A successful candidate will work with senior silicon design engineer s. The candidate will be highly accurate and detail-oriented, possessing positive communication and problem-solving skills.
Responsibilities
Responsible for participating in the pre-silicon verification for full chip, blocks, multi-chip and system-level verification
Specifying design verification plan at soc level/IP level
Specifying or reviewing verification plans for complex blocks within the ASIC
Responsible for developing complex verification environment using the latest coverage/assertions based verification design methodology, which includes:
self-checking, reusable, automated verification workplace : both at full-chip & block level
Constrained random generators and reference models
Carve out the scope and work hands-on on functional verification.
Guide/mentor junior members on the team
Work with internal/external stakholders to drive company-wide solutions
Qualifications
Minimum 12+ years of experience in ASIC Design Verification
Must have excellent knowledge of ASIC Design Flow and SOC architecture
Experience in developing complex testbench/model in verilog, System verilog or SystemC
Experience with coverage-based verification methodology
Experience in writing testplans and testcases
Excellent debug skills in functional simulations are must.
Experience in random test generation, coverage analysis, failure debug
Experience in low power concepts/verification (NLP/UPF) and emulation is positive-to-have
Solid Verilog, SystemVerilog, PLI interface, C/C++, Perl/shell scripts programming skills.
Must have very strong communication skills and the ability/desire to foster a team/global workplace.
Bachelors or Masters degree in computer engineering/Electrical Engineering
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