Description

- Summary

As a Senior Memory Circuit Design Verification Engineer, you will work in a highly innovative, motivated, young, and energetic design team capable of verifying complete products using state of the art DRAM memory technologies. You will need to have the ability to drive the team and the overall verification effort to ensure the timely delivery of a functionally correct design.

- Responsibilities

- Responsibilities for fastspice(Primesim/Finesim/spectre) based verification.
- Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes.
- Circuit understanding
- Block level circuit simulation , Analysis capability
- Analysis of the test modes , Basic DFT understanding
- Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs.
- Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features.




- Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products.
- Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design.
- Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements.

Good to Have Skills/Experience

Common

- Circuit simulation experience
- Analysis of Circuits , Timing concepts
- DFT knowledge
- schematic analysis

Digital Verification

- High level understanding of UVM
- DFT Features Both custom DFT and standard like scan chains
- Exposure to IEEE1500/JTAG

FastSpice Verification

- Critical timing, data path timing analysis
- Simulation based reliability analysis (BTI, HC)

📌 Semiconductor Design Engineer (Hyderabad)
🏢 Acesoft Labs
📍 Hyderabad