Role & responsibilities
Description
Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support.
- Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must.
- Perform layout verification like LVS/DRC/Antenna, quality check and support documentation.
- Responsible for on-time delivery of block-level layouts with acceptable quality.
- Excellent problem-solving skills in physical verification of custom layout.
- BE or MTech in Electronic/VLSI Engineering
- 4 + year experience in analog/custom layout design in advanced CMOS process.
##NOTE: custom layout or analog layout with TSMC 3nm/5nm7nm & 5+ exp **
TSMC/ SAMSUNG/ INTEL (mandatory)
Preferred candidate profile
Immediate joiners can share CV to :
[email protected]
**Connect/follow at linkedin: https://www.linkedin.com/in/aman-b056091b1/
📌 Layout Mask Designer (Bengaluru)
🏢 Acesoft Labs
📍 Bengaluru