Job Title:

ASIC Verification Engineer

Experience Required:

5+ Years

Roles & Responsibilities:

- Be part of a highly skilled ASIC team working on cutting-edge technology nodes.
- Responsible for end-to-end IP/Block and Subsystem-level verification from test plan creation, SystemVerilog/UVM testbench development, to verification signoff.
- Ensure first-pass silicon success through comprehensive verification coverage, including mixed-mode verification.
- Collaborate with domain experts across global locations to drive technical initiatives and verification strategies.

Mandatory Skills Required:

- Expertise in IP/Block/Subsystem-level verification.
- Robust understanding of AMBA protocols: APB, AHB, AXI.
- Proven ability in building test plans, UVM environments, and testbenches.
- Proficient in RTL debugging, developing scoreboards, writing assertions, and implementing functional and code coverage.
- Solid knowledge of Verilog and SystemVerilog.
- Strong written and verbal communication skills.
- Ability to work effectively in cross-functional and globally dispersed teams.

📌 Asic Verification Engineer (Hyderabad)
🏢 Acesoft Labs
📍 Hyderabad