Key Skills: CPU, interconnect, DDR, PCIe, UCIe, oscilloscopes, DAQ systems, thermal chambers, power analyzers, benchmarking and profiling tools, firmware, bootloader, UEFI/BIOS, ACPI

Roles & Responsibilities:
Plan and execute Silicon PVTF characterization activities across multiple projects and platforms.
Develop scalable automation frameworks, regression infrastructure, data collection flows, dashboards, and reporting tools.
Analyze leakage/static, active-idle, energetic, and Silicon boot power to identify bottlenecks and optimization opportunities.
Characterize voltage droop and loadline impedance.
Enable and port industry-standard, customer, and stress workloads required for silicon characterization.
Collaborate with SoC architecture, firmware, validation, and systems teams to debug and resolve silicon issues.

Skills Required:
Bachelor's degree in science or engineering; master's degree Preferred.
8+ years of experience in post-silicon characterization or validation.
Experience in characterizing any of the SoC IPs such as CPU, interconnect, DDR, PCIe, UCIe, or high-speed I/O subsystems.
Hands-on experience with lab equipment including oscilloscopes, DAQ systems, thermal chambers, power analyzers, and control units/devices for measurement and debug.




Understanding of power and Performance optimization techniques.
Experience with benchmarking and profiling tools such as SPEC2017, LMBench, Stress-ng, Fio, iPerf, or equivalent.
Valuable understanding of VRMs, PMICs, voltage rails, power delivery networks, and control mechanisms.
Ability to analyze and interpret large datasets from instrumentation and telemetry systems.
Experience working with firmware, bootloader, UEFI/BIOS, ACPI, or device tree flows.

Preferred Skills and Experience:
US B1/B2 valid Visa.
Proven background in performing VMIN analysis for any of the SoC IPs (CPU, Interconnect etc.)
Experience with pre-silicon modeling, simulation, emulation, or FPGA platforms.
Experience closing pre- and post-silicon power and performance correlation.
Scripting experience in Python, Shell, Perl, or similar languages.
Programming experience in C/C++ for low-level system software.
Experience in silicon bring-up, board enablement, validation of power management features such as DVFS, AVS, thermal throttling etc.
Understanding of Arm architecture, SoC architecture, firmware flows, and platform power/performance trade-offs.

Education: Bachelor's degree in Engineering

📌 Staff Silicon Power & Performance Engineer System Level Test & Characterization Bengaluru (India)
🏢 MyCareernet
📍 India