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Senior Principal DFT Engineer

NXP Semiconductors

Livefull-timeOn-site

Location

Pune, Maharashtra, India

Experience 10–10 years

Posted on

17 Sept 2026

Apply by 17 Oct 2026(28 days left)

Role at a glance

Openings

1

Experience 10–10 yrs

Salary

Confidential

Workplace

On-site

Eligibility

Open to all

Student status

Not specified

Location

Pune, Maharashtra, India

Categories

Embedded Systems EngineerEngineering

Skills Required Embedded Systems

Benefits & Facilities

Certificate / Experience Letter Laptop / Equipment Provided Stipend / Salary Training and Mentorship

/ Ai Overview NXP Semiconductors, a global leader in secure connectivity solutions, is actively seeking a highly skilled and experienced Senior Principal DFT Engineer to join our dynamic Microcontroller (MCU) team in Pune, India. This pivotal role offers an exceptional opportunity for a seasoned professional to lead and architect sophisticated Design-for-Test (DFT) solutions for cutting-edge semiconductor products. If you possess a deep understanding of DFT methodologies and a proven track record in complex IC design, we invite you to contribute to our mission of connecting brilliant minds with the future of semiconductors.

Key Responsibilities

- Architect comprehensive DFT designs and lead the insertion and simulation of DFT instruments for MCU products.
- Collaborate closely with SoC leads, IP designers, and Design Verification (DV) teams to ensure seamless DFT implementations and thorough verification coverage.
- Partner with the Back-End (BE) team for Static Timing Analysis (STA) in DFT modes and conduct IR drop analysis to optimize performance.




- Define and implement advanced DFT structures, designs, and methodologies, including scan, MBIST (Memory Built-In Self-Test), JTAG, and functional testing.
- Oversee the creation and validation of robust test vectors, ensuring their effectiveness for silicon bring-up and characterization.
- Work with the physical design team to achieve timing closure specifically in DFT modes, ensuring design integrity and manufacturability.
- Verify and sign-off that all DFT requirements are rigorously met throughout the design lifecycle.
- Provide expert guidance and mentorship to junior DFT Engineers, fostering their growth and development within the team.
- Collaborate with test engineers to successfully bring up test patterns on actual silicon, validating the functionality and performance of manufactured devices.

Requirements

- Bachelor's or Master's degree in Electrical Engineering, Electronics, or a related field.
- Minimum of 10 years of extensive experience in Design-for-Test (DFT) engineering, preferably within the semiconductor industry.
- Profound expertise in DFT architecture, implementation, and verification, including scan, MBIST, JTAG, and functional test techniques.
- Demonstrated experience with Static Timing Analysis (STA) in DFT modes and IR drop analysis.




- Strong understanding of test pattern generation, silicon bring-up, and debug processes.
- Proficiency in using industry-standard EDA tools for DFT insertion, simulation, and verification.
- Excellent problem-solving skills and the ability to work effectively in a collaborative, cross-functional team environment.
- Strong communication and interpersonal skills, with the ability to mentor and lead junior engineers.

What We Offer
- The opportunity to work with a global leader in the semiconductor industry on cutting-edge microcontroller technologies.
- A challenging and innovative work environment where your contributions directly impact product development.
- Opportunities for professional growth and career advancement within a energetic and supportive team.
- Competitive compensation and a comprehensive benefits package designed to support your well-being.
- A collaborative culture that encourages knowledge sharing, mentorship, and continuous learning.

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