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Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).

Senior DFT Engineer Responsibilities
- DFT architecture definition
- Understand SoC architecture and test requirements.
- Work very closely with the lead Product/Test engineering throughout the DFT definition phase to determine productive ways to optimize test cost and achieve high test coverage.
- Drive and optimize DFT architecture for high performance and efficiency:
- SCAN – scan partition, compression, at-speed, IR and low power
- MBIST for memories




- JTAG boundary scan insertion
- Handle responsibilities pertaining to both block and top-level activities in Hierarchical Scan.
- Implementation
- Develop / Upgrade SCAN & MBIST Insertion flows
- Develop appropriate timing constraints for SCAN/MBIST modes and debug timing violations
- ATPG flow implementation catering to various fault models, test pattern generation
- SCAN , MBIST & BSCAN Pattern Simulation
- Solutions to test analog macros
- Post-Silicon bring-up/support
- Work with Evaluation/Test Engineering team to bring-up patterns on ATE
- Work on failure analysis as required
- Work with the Operation team on test cost and yield improvement
- Improve DFT methodology to be in sync with latest best practices and technology in the industry
- Work closely with physical design team throughout the development cycle.
- Should be able to guide newly inducted team members on their bring-up on flow, methodology

📌 Senior DFT Engineer (Bengaluru)
🏢 Analog Devices
📍 Bengaluru