Job Description
Hiring for DFT Senior Engineer 9+ years
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nLooking for an experienced DFT Engineer with 9+ years of industry experience in ASIC/SoC Design for Test (DFT) implementation and validation. The candidate will be responsible for architecting, implementing, and verifying DFT solutions for complex SoCs.
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nKey Responsibilities
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- Define and implement DFT architecture for complex SoCs.n
- Integrate and verify Scan, MBIST, Boundary Scan (JTAG), and compression logic.n
- Perform DFT rule checks, ATPG pattern generation, and pattern validation.n
- Analyze test coverage, debug coverage issues, and drive closure.n
- Develop and maintain DFT flows, scripts, and automation.n
- Support post-silicon bring-up and production testing activities.n
- Work closely with RTL, Verification, Physical Design, and Product Engineering teams.n
- Ensure successful DFT sign-off and tape-out readiness.n
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nMandatory Skills
n✅ 9+ years of hands-on DFT experience
n✅ Robust expertise in:
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- Scan Insertion and Scan Compressionn
- ATPG and Fault Coverage Analysisn
- MBIST Implementation and Verificationn
- JTAG / IEEE 1149.1n
- DFT DRC and Debugn
- SoC-level DFT Integrationn
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nEducational Qualification
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- B.E./B.Tech/M.E./M.Tech in Electronics, Electrical, VLSI, or related disciplines.n
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nNotice period : Any
nLocation: Open to discuss
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nInterested candidates can share their updated resume along with the following details:
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- Namen
- Contactn
- Email idn
- Current Companyn
- Total Experiencen
- Relevant DFT Experiencen
- Current CTCn
- Expected CTCn
- Notice Period / LWDn
- Current Locationn
- Preferred Locationn