21 Sep
|
Weekday AI
|
Bengaluru
21 Sep
Weekday AI
Bengaluru
Description
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Experience: 7+ yrs
Location: Bengaluru, Karnataka
Job Type: Full time
We are looking for an experienced Senior RTL Integration Engineer to lead the integration of complex RTL designs and third-party IPs for advanced SoC and semiconductor products. This role requires strong hands-on expertise in RTL Integration and Verilog, along with a solid understanding of digital design, SoC architecture, interconnects, clocking, resets, and design-quality methodologies.
The ideal candidate will be responsible for integrating large and complex RTL blocks, ensuring connectivity and functionality, resolving integration issues, and supporting the design through verification, synthesis, physical design, and tapeout. You will collaborate closely with Architecture, Design Verification, DFT, Synthesis, Physical Design, and other engineering teams to deliver high-quality silicon-ready designs.
Requirements
KEY RESPONSIBILITIES
- Lead RTL integration for complex SoCs, subsystems,
and multi-million-gate designs.
- Integrate internal and third-party IPs using Verilog/SystemVerilog and established integration methodologies.
- Develop and maintain RTL connectivity between processors, memories, interconnects, peripherals, and subsystem interfaces.
- Work with protocols including AMBA AXI4, AHB, APB, and related interconnect standards.
- Integrate IPs such as PCIe, DDR, Ethernet, ARM/RISC-V processors, and other SoC components.
- Handle clock, reset, configuration, power, and connectivity requirements across integrated designs.
- Perform RTL quality checks including lint, CDC, RDC, and structural verification.
- Work with tools such as SpyGlass, Questa CDC, VC SpyGlass, or equivalent static-analysis platforms.
- Develop and review SDC timing constraints and collaborate with Synthesis and Physical Design teams on timing requirements.
- Analyse synthesis, timing, area, and power r
📌 Senior RTL Integration Engineer (Bengaluru)
🏢 Weekday AI
📍 Bengaluru