Job DescriptionSenior LEC/CLP Engineer
nExperience:- 3 to 6 Years
nNotice Period:- 0 to 45 Days
nLocation:- Bangalore
nRole Overview:
nWe are seeking a experienced LEC / CLP Engineer with expertise in Logic Equivalence Check (LEC) and Conformal Low Power (CLP) methodologies.
nKey Responsibilities:
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- Lead Logic Equivalence Check (LEC) and Low Power verification (CLP) activities across block and full-chip levels.n
- Define and implement LEC/CLP methodologies using industry-standard tools (Cadence Conformal, Synopsys Formality, etc.).n
- Validate low-power architecture, UPF/CPF constraints, and intent across multiple domains.n
- Collaborate with RTL, Synthesis, and Physical Design teams to resolve mismatches.n
- Review and debug LEC/CLP failures to drive sign-off closure.n
- Automate verification flows using Python/Perl/TCL scripting.n





nRequired Skills
nExpertise with tools like Cadence Conformal, Synopsys Formality, or equivalent.
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- Strong understanding of RTL-to-netlist equivalence, low-power UPF/CPF verification, and multi-power domain SoCs.n
- Proven track record in debugging LEC/CLP failures and collaborating across design teams.n
- Proficiency in scripting (Python, Perl, TCL) for automation.n
- Solid analytical, problem-solvingn

nPreferred Qualifications:
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- Master's or Bachelor's in Electronics / Electrical / VLSI Engineering.n
- Experience in advanced nodes (7nm and below).n
- Exposure to low-power design methodologies and complex SoC projects.n

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