23 Sep
|
smartsoc solutions
|
Bengaluru
23 Sep
smartsoc solutions
Bengaluru
Job Description
Key Responsibilities:
n
- n
- Strong experience in CPU Core RTL Design: Single-thread / Multi-thread, In-order / Limited Out-of-Order pipelinesn
- Must have completed at least one full CPU core development cycle n
- Experience in real-time/high-performance cores (e.g., ARM Cortex-R52 or equivalent) n
- Hands-on in RTL coding (Verilog/SystemVerilog), Timing analysis & closure, Power analysis & optimization n
- Valuable understanding of: CPU pipeline and Performance, PPA trade-offsn
- Ability to debug and fix timing/power issues and collaborate with PD/Verification teamsn
n
n
nInterested can share cv to
📌 CPU-RTL design Engineer (Bengaluru)
🏢 smartsoc solutions
📍 Bengaluru