Job DescriptionHiring for DFT Senior Engineer 9+ years
nLooking for an experienced DFT Engineer with 9+ years of industry experience in ASIC/SoC Design for Test (DFT) implementation and validation. The candidate will be responsible for architecting, implementing, and verifying DFT solutions for complex SoCs.
nKey Responsibilities
n
n
Define and implement DFT architecture for complex SoCs.n
Integrate and verify Scan, MBIST, Boundary Scan (JTAG), and compression logic.n
Perform DFT rule checks, ATPG pattern generation, and pattern validation.n
Analyze test coverage, debug coverage issues, and drive closure.n
Develop and maintain DFT flows, scripts, and automation.n
Support post-silicon bring-up and production testing activities.n
Work closely with RTL, Verification, Physical Design, and Product Engineering teams.n
Ensure successful DFT sign-off and tape-out readiness.n

nMandatory Skills




n9+ years of hands-on DFT experience
nStrong expertise in:
n
n
Scan Insertion and Scan Compressionn
ATPG and Fault Coverage Analysisn
MBIST Implementation and Verificationn
JTAG / IEEE 1149.1n
DFT DRC and Debugn
SoC-level DFT Integrationn

nEducational Qualification
n
n
B.E./B.Tech/M.E./M.Tech in Electronics, Electrical, VLSI, or related disciplines.n

nNotice period : Any
nLocation: Open to discuss
nInterested candidates can share their updated resume along with the following details:
n
n
Namen
Contactn
Email idn
Current Companyn
Total Experiencen
Relevant DFT Experiencen
Current CTCn
Expected CTCn
Notice Period / LWDn
Current Locationn
Preferred Locationn

nEmail:

📌 Dft Senior Engineer Karnataka
🏢 HCLTech
📍 Karnataka