Job Description
Senior LEC/CLP Engineer
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nExperience:- 3 to 6 Years
nNotice Period:- 0 to 45 Days
nLocation:- Bangalore
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nRole Overview:
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nWe are seeking a experienced LEC / CLP Engineer with expertise in Logic Equivalence Check (LEC) and Conformal Low Power (CLP) methodologies.
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nKey Responsibilities:
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Lead Logic Equivalence Check (LEC) and Low Power verification (CLP) activities across block and full-chip levels.n

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Define and implement LEC/CLP methodologies using industry-standard tools (Cadence Conformal, Synopsys Formality, etc.).n

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Validate low-power architecture, UPF/CPF constraints, and intent across multiple domains.n

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Collaborate with RTL, Synthesis, and Physical Design teams to resolve mismatches.n

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Review and debug LEC/CLP failures to drive sign-off closure.n

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Automate verification flows using Python/Perl/TCL scripting.n

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nRequired Skills
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nExpertise with tools like Cadence Conformal, Synopsys Formality, or equivalent.
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Solid understanding of RTL-to-netlist equivalence, low-power UPF/CPF verification, and multi-power domain SoCs.n
Proven track record in debugging LEC/CLP failures and collaborating across design teams.n
Proficiency in scripting (Python, Perl, TCL) for automation.n
Robust analytical, problem-solvingn

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nPreferred Qualifications:
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Master’s or Bachelor’s in Electronics / Electrical / VLSI Engineering.n
Experience in advanced nodes (7nm and below).n
Exposure to low-power design methodologies and complex SoC projects.n

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📌 Senior Lec Bengaluru
🏢 leadsoc technologies
📍 Bengaluru