Senior Verification Engineer
Experience: 5+ Years
Location: Bangalore / Hyderabad
Notice Period: Immediate to 30 Days
Key Responsibilities:
- Strong experience in IP/SoC/Sub-system Design Verification.
- Hands-on expertise in SystemVerilog and UVM.
- Strong knowledge of High-Speed Protocols such as PCIe, CXL, USB, Ethernet, or similar.
- Develop and maintain verification environments, testbenches, test plans, and test cases.
- Robust understanding of functional coverage, assertions, regression, and constrained-random verification.
- Debug simulation failures and perform protocol-level and functional debugging.
- Collaborate with design and architecture teams to identify and resolve verification issues.
- Experience with SoC/IP integration and verification is an added advantage.
Interested candidates available within 30 days are encouraged to apply.
[email protected]
📌 Senior Verification Engineer (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru