We are seeking a Senior Staff Layout Design Engineer with deep expertise in analog and mixed-signal layout for power and analog IC products. This is a senior individual-contributor role requiring strong technical ownership, independent judgment, and the ability to lead layout execution for complex blocks and full-chip designs.

The successful candidate will translate circuit requirements into robust, manufacturable layouts for products such as PMICs, linear and switching regulators, gate drivers, battery-management ICs, and other power and analog devices. The role requires close collaboration with analog designers, CAD, process, package, reliability, and verification teams.

You will be expected to own challenging layout problems, establish best practices, improve methodology and automation, mentor engineers, and drive projects from floor planning through physical verification and tape-out readiness.

Responsibilities

Layout Architecture & Execution

- Own floor planning and physical implementation for complex analog, power, and mixed-signal blocks, and contribute to full-chip layout planning.
- Collaborate with circuit designers to capture electrical, matching, isolation, current-density, thermal, reliability, and area requirements.
- Apply advanced layout techniques for device matching, parasitic reduction, noise isolation, high-current routing, electromigration robustness, thermal behavior, and yield optimization.
- Drive routing, integration, and sign-off readiness for block-level and chip-level layouts.

Physical Verification & Sign-off

- Own and review DRC, LVS, ERC, PEX, antenna, density, latch-up,



and reliability verification as required by the process and product.
- Analyse extracted parasitics with designers and support post-layout simulation closure.
- Identify physical-design risks early and drive corrective actions with design, CAD, PDK, process, and package teams.
- Ensure layout databases, review records, and release documentation meet tape-out quality standards.

Methodology, Automation & IP Reuse

- Develop and deploy automation using SKILL, TCL, Python, Perl, or similar languages to improve quality and turnaround time.
- Drive layout methodology improvements, reusable templates, checklists, and portability of IP across products and process technologies.
- Work with corporate engineering and CAD teams to resolve tool, PDK, extraction, and process-flow issues.
- Evaluate current layout tools and techniques and lead practical adoption within the team.

Technical Leadership & Mentorship

- Lead layout reviews and provide clear estimates, progress updates, risk assessments, and recovery plans.
- Mentor junior and mid-level layout engineers and raise the technical standard of the broader team.
- Influence project planning, task allocation, technical decisions, and hiring through demonstrated technical depth.
- Operate independently on ambiguous and complex assignments,



escalating issues with clear options and recommendations. Qualifications
- Bachelor or Masters degree in Electrical Engineering, Electronics Engineering, or a related discipline.
- 10+ years of relevant experience in analog, power, or mixed-signal IC layout and associated development flows.
- Demonstrated ownership of complex block-level layout and meaningful contribution to full-chip integration and tape-out.
- Deep understanding of matching, parasitic control, noise isolation, guard rings, latch-up prevention, high-current routing, electromigration, IR drop, thermal effects, and reliability-aware layout.
- Hands-on expertise with Cadence Virtuoso and physical verification tools such as Calibre, PVS, or equivalent. Experience with extraction and reliability tools is expected.
- Experience working with deep-submicron CMOS and preferably BCD or high-voltage process technologies.
- Ability to automate layout or verification tasks using SKILL, TCL, Python, Perl, or similar scripting languages.
- Proven ability to lead technical reviews, mentor engineers, and drive layout methodology improvements.
- Strong cross-functional communication skills in a multisite and multicultural environment.
- Results-oriented, self-driven, and able to deliver high-quality work under tight schedules with limited supervision.

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 Senior Staff Engineer, Layout Design (Bengaluru)
🏢 Renesas
📍 Bengaluru