24 Sep
|
Skillyt
|
Bengaluru
Key Responsibilities
Lead architecture, design, and implementation of digital subsystems including FPGAs, SoCs, high-
speed interfaces such as PCIe, DDR, JESD, SERDES, and DSP pipelines.
Drive design of digital processing algorithms for radar, EW, and signal intelligence systems using VHDL,
Verilog, or SystemVerilog.
Collaborate with RF, Antenna, Firmware, and Embedded teams for real-time co-design and optimization.
Oversee design entry, synthesis, place-and-route, timing closure, and board-level bring-up across Xilinx,
Intel (Altera), or Microsemi platforms.
Ensure compliance with MIL-STD-461/810, DO-254, and other relevant certification frameworks.
Lead validation through simulations, lab testing, and field trials using logic analyzers, protocol analyzers,
and automated test benches.
Mentor a team of digital engineers and establish best practices in version control, documentation, and verification methodologies such as UVM, ModelSim, and Vivado.
Engage with DRDO labs, defence PSUs,
and academic partners for advanced co-development initiatives.
Drive innovation through IP generation, reconfigurable architectures, and digital technology road maps.
Preferred Candidate Profile BE/B.Tech in ECE or M.Tech/MS in Digital Electronics, VLSI Design, Embedded Systems, or related field.
12–18 years of experience in digital hardware development for radar, EW, or embedded defence platforms.
Expertise in FPGA/SoC-based design using Xilinx/Intel/Microsemi platforms, signal-processing implementation, and high-speed digital interface design.
Proficiency in VHDL/Verilog, MATLAB, Simulink, Vivado, Quartus, ModelSim, and version-control systems such as Git/SVN.
Experience in DO-254/DO-160 environments and EMI/EMC-compliant board-level system design.
Skills: vhdl,digital hardware development,field-programmable gate arrays (fpga)
📌 Senior Manager – Digital Systems (Bengaluru)
🏢 Skillyt
📍 Bengaluru