RTL Design Engineer

Experience: 7–20+ Years

Location: Bangalore

Role: Senior / Lead / Principal RTL Design Engineer

Job Overview

We are looking for experienced RTL Design Engineers with a solid background in Microarchitecture and Digital Design to work on complex semiconductor designs. The ideal candidate should have strong hands-on experience taking designs from microarchitecture/specification through RTL implementation, verification, synthesis and sign-off.

Key Responsibilities

- Understand and contribute to microarchitecture specifications and design requirements.
- Translate microarchitecture into high-quality, synthesizable RTL using Verilog/SystemVerilog.
- Design and implement complex IP, subsystem, SoC, CPU/GPU or processor blocks.
- Participate in microarchitecture definition, design reviews and RTL architecture discussions.
- Develop optimized RTL considering performance, power, area (PPA) and design complexity.
- Work closely with Architecture, Verification, Physical Design and STA teams.
- Perform RTL simulation, debugging and functional issue resolution.
- Support lint, CDC, synthesis, STA and other design-quality checks.
- Analyze and resolve timing, area, power and functional issues.
- Drive design closure and support integration of RTL blocks into larger SoC designs.




- Mentor junior engineers and contribute to RTL coding standards and design methodologies.

Required Skills
- 7–20+ years of experience in RTL Design / Digital Design.
- Strong hands-on experience with Verilog/SystemVerilog.
- Strong understanding of Microarchitecture and Digital Logic Design.
- Experience in designing complex IP/SoC/subsystem blocks.
- Good understanding of ASIC design flow from specification to implementation.
- Strong knowledge of RTL coding, synthesis, lint, CDC and STA.
- Experience with PPA optimization and timing closure.
- Strong debugging and problem-solving skills.
- Experience working with cross-functional teams including DV, Architecture and Physical Design.

Preferred / Good to Have
- Experience with CPU, GPU, AI/ML accelerators, interconnects or high-speed interfaces.
- Experience in ARM/processor-based SoC designs.
- Knowledge of low-power design methodologies.
- Experience with formal verification and design-quality checks.
- Experience leading RTL design teams or mentoring engineers.

Candidate Profile Candidates should have a strong microarchitecture foundation, excellent RTL coding skills, and experience owning complex blocks from microarchitecture through RTL and design closure.

📌 Senior / Lead / Principal RTL Design Engineer (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru