Position: Power-Performance / System Optimization Engineer (IRT510ST RM 4409)
Work mode : Hybrid
Position Summary
Develop system-level models and analysis methodologies to optimize performance, power, and efficiency of the company s chiplet-based AI infrastructure.
Education : B.E. / B.Tech / M.E. / M.Tech in Electronics, Electrical, or related discipline.
Key Responsibilities
- Power-Performance Modelling: Develop appropriate abstraction models for power infrastructure; model voltage/frequency and power-management scenarios; analyze power-performance trade-offs; evaluate power impact of workload and system configurations.
- System Performance & Architecture Exploration: Perform performance-per-watt analysis; analyze the impact of connectivity, memory, and workload configurations on system efficiency; identify architectural bottlenecks affecting power and performance; support architecture optimization studies
Required Technical Skills
- 5-10+ years of SoC/system architecture or power-performance engineering experience.
- Power/performance modelling.
- C++ / Python.
- SystemC/TLM.
- SoC architecture.
- AI/HPC systems.
- Power-management concepts.
Preferred Skills
- DVFS.
- Thermal modelling.
- In-package power delivery.
- IVR (integrated voltage regulation) technology.
- HBM power modelling.
- AI accelerator power analysis.
Project Experience : Hands-on power-performance modelling or optimization work on a SoC/system-level platform.
Soft Skills
- Ability to balance competing power, performance, and efficiency objectives and communicate tradeoffs clearly.
- Strong collaboration with connectivity, memory, and performance architecture teams.
Valuable to Have
- Direct DVFS or thermal-modelling experience on a production SoC.
- Exposure to in-package power delivery or integrated voltage regulation technology.
Expected Deliverables
- Power/performance abstraction models and voltage/frequency scenario analysis.
- Performance-per-watt analysis reports.
- Architecture optimization recommendations addressing power and performance bottlenecks.
Growth Path:
- Progress toward Senior Power-Performance Architect or System Optimization Lead roles.
Job Category: Embedded HW_SW
Job Type: Full Time
Job Location: Bangalore Hyderabad
Experience: 5 - 10 years
Notice period: 0-30 days
Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.