Memory Layout Engineer (Bengaluru)

Memory Layout Engineer (Bengaluru)

24 Sep
|
smartsoc solutions
|
Bengaluru

24 Sep

smartsoc solutions

Bengaluru

Solid experience in Memory Layout / Custom Layout.

Hands-on experience with Cadence Virtuoso.

Good understanding of DRC/LVS/ERC and physical verification.

Experience with Calibre or equivalent verification tools.

Good understanding of CMOS devices, matching techniques, common-centroid layout, shielding, guard rings, and routing.

Experience with advanced technology nodes is an added advantage.

Ability to interpret schematics and work independently on layout implementation.SRAM / ROM / Register File / Memory Compiler layout.

Advanced-node memory layout experience.

Experience with TSMC / Samsung / GlobalFoundries technologies.

Experience working on full-custom analog/mixed-signal environments.

📌 Memory Layout Engineer (Bengaluru)
🏢 smartsoc solutions
📍 Bengaluru

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