Lead STA | 8 - 15 Yrs: Lead STA/timing closure for ASIC/SoC. Expertise in SDC, MCMM, OCV/AOCV/POCV, setup/hold, CTS, SI, ECO, PrimeTime/Tempus, Tcl/Python and signoff timing.
Experience in 7nm/5nm/4nm/3nm/2nm, AI accelerators, CPU/GPU/NPU
📌 Lead/Manager/Director - STA (Bengaluru)
🏢 Embedded Ai Design Labs
📍 Bengaluru
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